NADIsim: NoC Adaptive Design Interface Simulator

NADIsim (NoC adaptive design interface simulator) is a high-level network on chip simulator which is developed to enable early design stage exploration of various configurations of NoC, testing and fault injection. It supports different features for online testing methods, error recovery flow control methods, information redundancies, time redundancies and different fault injection rates. The accuracy of the simulator is verified versus register-transfer-level (RTL) simulator. Also, an adaptive online testing method based on probabilistic packet marking (PPM) is proposed which adapts the number of error checking with existing error rate in the network while eliminating online testing feature redundancies in the routers. While area and energy are critical constraints in chip designs this method fills in the gap of balancing number of error checking procedures with existing error rate to avoid excess energy consumption while it does not impose excess area overhead to the chip.